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  1. Friedrich-Alexander-Universität
  2. Technische Fakultät
  3. Department Informatik
Friedrich-Alexander-Universität Lehrstuhl für Informatik 4 (Systemsoftware)
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              Dokumentation

              Classes | Typedefs | Enumerations | Functions | Constants
              IOAPIC Namespace Reference

              Abstraction of the I/O APIC that is used for management of external interrupts. More...

              Classes

              struct  Identification.__unnamed46__
               

              Typedefs

              typedef uint32_t Index
               
              typedef uint32_t Register
               

              Enumerations

              enum  DeliveryMode {
                FIXED = 0 ,
                LOWEST_PRIORITY = 1 ,
                SMI = 2 ,
                NMI = 4 ,
                INIT = 5 ,
                EXTERN_INT = 7
              }
               Delivery mode specifies the type of interrupt sent to the CPU. More...
               
              enum  DestinationMode {
                PHYSICAL = 0 ,
                LOGICAL = 1
              }
               Way of interpreting the value written to the destination field. More...
               
              enum  Polarity {
                HIGH = 0 ,
                LOW = 1
              }
               Interrupt polarity for the redirection-table entry. More...
               
              enum  TriggerMode {
                EDGE = 0 ,
                LEVEL = 1
              }
               Trigger mode. More...
               
              enum  DeliveryStatus {
                IDLE = 0 ,
                SEND_PENDING = 1
              }
               Interrupt state. More...
               
              enum  InterruptMask {
                UNMASKED = 0 ,
                MASKED = 1
              }
               Interrupt masking. More...
               

              Functions

              void init ()
               Initializes the I/O APIC. More...
               
              void config (uint8_t slot, Core::Interrupt::Vector vector, TriggerMode trigger_mode=TriggerMode::EDGE, Polarity polarity=Polarity::HIGH)
               Creates a mapping between an interrupt vector and an external interrupt. More...
               
              void allow (uint8_t slot)
               Enables the redirection of particular external interrupts to the CPU(s). More...
               
              void forbid (uint8_t slot)
               Selectively masks external interrupts by slot number. More...
               
              bool status (uint8_t slot)
               Check whether an external interrupt source is masked. More...
               

              Constants

              volatile Index * IOREGSEL_REG = reinterpret_cast<volatile Index*>(0xfec00000)
               IOAPIC registers memory mapped into the CPU's virtual address space. More...
               
              volatile Register * IOWIN_REG = reinterpret_cast<volatile Register*>(0xfec00010)
               IOAPIC registers memory mapped into the CPU's virtual address space. More...
               
              const Index IOAPICID_IDX = 0x00
               
              const Index IOREDTBL_IDX = 0x10
               
              const uint8_t slot_max = 24
               

              Detailed Description

              Abstraction of the I/O APIC that is used for management of external interrupts.

              The I/O APIC's Core component is the IO-redirection table. This table is used to configure a flexible mapping between the interrupt number and the external interruption. Entries within this table have a width of 64 bit. For convenience, the union IOAPIC::RedirectionTableEntry should be used for modifying these tables (see file ioapic_registers.h for details).


              Class Documentation

              struct IOAPIC::Identification.__unnamed46__
              Class Members
              uint32_t __pad0__: 24 Reserved, do not modify.
              uint32_t id: 4 I/O APIC Identification.

              Enumeration Type Documentation

              enum IOAPIC::DeliveryMode

              Delivery mode specifies the type of interrupt sent to the CPU.

              Enumerator
              FIXED 

              "ordinary" interrupt; send to ALL cores listed in the destination bit mask

              LOWEST_PRIORITY 

              "ordinary" interrupt; send to the lowest priority core from destination mask

              SMI 

              System Management Interrupt; vector number required to be 0.

              NMI 

              Non-Maskable Interrupt, vector number ignored, only edge triggered.

              INIT 

              Initialization interrupt (always treated as edge triggered)

              EXTERN_INT 

              external interrupt (only edge triggered)

              enum IOAPIC::DestinationMode

              Way of interpreting the value written to the destination field.

              Enumerator
              PHYSICAL 

              Destination contains the physical destination APIC ID.

              LOGICAL 

              Destination contains a mask of logical APIC IDs.

              enum IOAPIC::Polarity

              Interrupt polarity for the redirection-table entry.

              Enumerator
              HIGH 

              active high

              LOW 

              active low

              enum IOAPIC::TriggerMode

              Trigger mode.

              Enumerator
              EDGE 

              edge triggered

              LEVEL 

              level triggered

              enum IOAPIC::DeliveryStatus

              Interrupt state.

              Enumerator
              IDLE 

              No activity for this interrupt.

              SEND_PENDING 

              Interrupt will be sent as soon as the bus / LAPIC is ready.

              enum IOAPIC::InterruptMask

              Interrupt masking.

              Enumerator
              UNMASKED 

              Redirection-table entry is active (non-masked)

              MASKED 

              Redirection-table entry is inactive (masked)

              Function Documentation

              void IOAPIC::init ( )

              Initializes the I/O APIC.

              This function will initialize the I/O APIC by initializing the IO-redirection table with sane default values. The default interrupt-vector number is chosen such that, in case the interrupt is issued, the panic handler is executed. In the beginning, all external interrupts are disabled within the I/O APIC. Apart from the redirection table, the APICID (read from the system description tables during boot) needs to be written to the IOAPICID register (see APIC::getIOAPICID() )

              void IOAPIC::config ( uint8_t  slot,
              Core::Interrupt::Vector  vector,
              TriggerMode  trigger_mode = TriggerMode::EDGE,
              Polarity  polarity = Polarity::HIGH 
              )

              Creates a mapping between an interrupt vector and an external interrupt.

              Parameters
              slotNumber of the slot (i.e., the external interrupt) to configure.
              vectorNumber of the interrupt vector that will be issued for the external interrupt.
              trigger_modeEdge or level triggered interrupt signaling (level-triggered interrupts required for the optional serial interface)
              polarityPolarity of the interrupt signaling (active high or active low)
              void IOAPIC::allow ( uint8_t  slot)

              Enables the redirection of particular external interrupts to the CPU(s).

              To fully enable interrupt handling, the interrupts must be enabled for every CPU (e.g., by calling Core::Interrupt::enable() in main)

              Parameters
              slotNumber of the external interrupt that should be enabled.
              void IOAPIC::forbid ( uint8_t  slot)

              Selectively masks external interrupts by slot number.

              Parameters
              slotSlot number of the interrupt to be disabled.
              bool IOAPIC::status ( uint8_t  slot)

              Check whether an external interrupt source is masked.

              Parameters
              slotSlot number of the interrupt to be checked.
              Returns
              Returns true iff the interrupt is unmasked, false otherwise

              Constant Documentation

              volatile Index * IOAPIC::IOREGSEL_REG = reinterpret_cast<volatile Index*>(0xfec00000)

              IOAPIC registers memory mapped into the CPU's virtual address space.

              Access to the actual IOAPIC registers can be obtained by performing the following steps:

              1. Write the number of the IOAPIC register to the address stored in IOREGSEL_REG
              2. Read the value from / write the value to the address referred to by IOWIN_REG.
              See also
              IO-APIC manual
              volatile Register * IOAPIC::IOWIN_REG = reinterpret_cast<volatile Register*>(0xfec00010)

              IOAPIC registers memory mapped into the CPU's virtual address space.

              Access to the actual IOAPIC registers can be obtained by performing the following steps:

              1. Write the number of the IOAPIC register to the address stored in IOREGSEL_REG
              2. Read the value from / write the value to the address referred to by IOWIN_REG.
              See also
              IO-APIC manual
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