512 byte structure for FPU / MMX / SSE registers corresponds to the layout used by the instructions fxsave
and fxrstor
.
More...
#include <machine/fpu.h>
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struct | ST |
| 80 bit registers for FPU stack / MMX More...
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struct | XMM |
| 128 bit SSE registers More...
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void | init () |
| Set structure to the initial FPU state Clears the FPU state (but its not just zeroed!)
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void | save () |
| Save the current FPU (+ MMX + SSE) state into this structure. More...
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void | restore () |
| Restore the saved FPU (+ MMX + SSE) state from this structure. More...
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uint16_t | fcw |
| FPU Control Word.
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uint16_t | fsw |
| FPU Status Word.
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uint8_t | ftw |
| FPU Tag Word.
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uint16_t | __pad0__: 0 |
| (16 bit alignment)
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uint16_t | fop |
| FPU Opcode.
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union { |
uint64_t | ip |
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struct { |
uint32_t | ip_off |
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uint32_t | ip_seg |
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} | |
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}; | |
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union { |
uint64_t | dp |
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struct { |
uint32_t | dp_off |
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uint32_t | dp_seg |
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} | |
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}; | |
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uint32_t | mxcsr |
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uint32_t | mxcsr_mask |
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struct { |
ST | value |
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uint64_t | __pad0__: 48 |
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} | st [8] |
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XMM | xmm [16] |
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uint64_t | reserved [12] |
| (reserved)
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512 byte structure for FPU / MMX / SSE registers corresponds to the layout used by the instructions fxsave
and fxrstor
.
- See also
- ISDMv1 Chapter 10.5.1 FXSAVE Area
80 bit registers for FPU stack / MMX
Class Members |
uint64_t |
fraction: 63 |
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uint64_t |
integer: 1 |
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uint16_t |
exponent: 15 |
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uint16_t |
sign: 1 |
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Class Members |
uint64_t |
low |
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uint64_t |
high |
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void FPU::State::save |
( |
| ) |
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inline |
Save the current FPU (+ MMX + SSE) state into this structure.
- Note
- Structure has to be 16 byte aligned
void FPU::State::restore |
( |
| ) |
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inline |
Restore the saved FPU (+ MMX + SSE) state from this structure.
- Note
- Structure has to be 16 byte aligned
The documentation for this struct was generated from the following files:
- machine/fpu.h
- machine/fpu.cc