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  2. Technische Fakultät
  3. Department Informatik
Friedrich-Alexander-Universität Lehrstuhl für Informatik 4 (Systemsoftware)
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                Aufgabe 1: Ein-/Ausgabe

                Namespaces | Classes | Typedefs | Enumerations | Functions | Constants
                LAPIC Namespace Reference
                Interrupt Handling

                Abstracts the local APIC (which is integrated into every CPU core) More...

                Namespaces

                namespace  IPI
                 Inter-Processor Interrupts.
                 
                namespace  Timer
                 Local Timer (for each LAPIC / CPU)
                 

                Classes

                struct  SpuriousInterruptVectorRegister.__unnamed39__
                 

                Typedefs

                typedef uint32_t Register
                 

                Enumerations

                enum  Model {
                  CLUSTER = 0x0 ,
                  FLAT = 0xf
                }
                 
                enum  APICSoftware {
                  APIC_DISABLED = 0 ,
                  APIC_ENABLED = 1
                }
                 APIC Software Status for Spurious Interrupt Vector.
                 
                enum  FocusProcessorChecking {
                  CHECKING_ENABLED = 0 ,
                  CHECKING_DISABLED = 1
                }
                 Focus Processor Checking for Spurious Interrupt Vector.
                 
                enum  SuppressEOIBroadcast {
                  BROADCAST = 0 ,
                  SUPPRESS_BROADCAST = 1
                }
                 Suppress End-Of-Interrupt-Broadcast for Spurious Interrupt Vector.
                 
                enum  Index : uint16_t {
                  IDENTIFICATION = 0x020 ,
                  VERSION = 0x030 ,
                  TASK_PRIORITY = 0x080 ,
                  EOI = 0x0b0 ,
                  LOGICAL_DESTINATION = 0x0d0 ,
                  DESTINATION_FORMAT = 0x0e0 ,
                  SPURIOUS_INTERRUPT_VECTOR = 0x0f0 ,
                  INTERRUPT_COMMAND_REGISTER_LOW = 0x300 ,
                  INTERRUPT_COMMAND_REGISTER_HIGH = 0x310 ,
                  TIMER_CONTROL = 0x320 ,
                  TIMER_INITIAL_COUNTER = 0x380 ,
                  TIMER_CURRENT_COUNTER = 0x390 ,
                  TIMER_DIVIDE_CONFIGURATION = 0x3e0
                }
                 Register Offset Index. More...
                 

                Functions

                Register read (Index idx)
                 Get value from APIC register. More...
                 
                void write (Index idx, Register value)
                 Write value to APIC register. More...
                 
                uint8_t getID ()
                 Get the ID of the current core's LAPIC. More...
                 
                uint8_t getLogicalID ()
                 Get the Logical ID of the current core's LAPIC. More...
                 
                uint8_t getVersion ()
                 Get version number of local APIC. More...
                 
                void init (uint8_t logical_id)
                 Initialized the local APIC of the calling CPU core and sets the logical LAPIC ID in the LDR register. More...
                 
                void endOfInterrupt ()
                 Signalize EOI (End of interrupt) More...
                 
                void setLogicalID (uint8_t id)
                 Set the Logical ID of the current core's LAPIC. More...
                 

                Constants

                volatile uintptr_t base_address = 0xfee00000
                 Base Address used with offset to access memory mapped registers.
                 

                Detailed Description

                Abstracts the local APIC (which is integrated into every CPU core)

                In modern (x86) PCs, every CPU core has its own Local APIC (LAPIC). The LAPIC is the link between the local CPU core and the I/O APIC (that takes care about external interrupt sources. Interrupt messages received by the LAPIC will be passed to the corresponding CPU core and trigger the interrupt handler on this core.

                See also
                ISDMv3 10.4 Local APIC

                Class Documentation

                struct LAPIC::SpuriousInterruptVectorRegister.__unnamed39__
                Class Members
                uint32_t spurious_vector: 8 Spurious Vector.
                APICSoftware apic_software: 1 APIC Software Enable/Disable.
                FocusProcessorChecking focus_processor_checking: 1 Focus Processor Checking.
                uint32_t reserved_1: 2
                SuppressEOIBroadcast eoi_broadcast_suppression: 1
                uint32_t reserved:19

                Enumeration Type Documentation

                enum LAPIC::Index : uint16_t

                Register Offset Index.

                See also
                ISDMv3 10.4.1 The Local APIC Block Diagram
                Enumerator
                IDENTIFICATION 

                Local APIC ID Register, RO (sometimes R/W). Do not change!

                VERSION 

                Local APIC Version Register, RO.

                TASK_PRIORITY 

                Task Priority Register, R/W.

                EOI 

                EOI Register, WO.

                LOGICAL_DESTINATION 

                Logical Destination Register, R/W.

                DESTINATION_FORMAT 

                Destination Format Register, bits 0-27 RO, bits 28-31 R/W.

                SPURIOUS_INTERRUPT_VECTOR 

                Spurious Interrupt Vector Register, bits 0-8 R/W, bits 9-1 R/W.

                INTERRUPT_COMMAND_REGISTER_LOW 

                Interrupt Command Register 1, R/W.

                INTERRUPT_COMMAND_REGISTER_HIGH 

                Interrupt Command Register 2, R/W.

                TIMER_CONTROL 

                LAPIC timer control register, R/W.

                TIMER_INITIAL_COUNTER 

                LAPIC timer initial counter register, R/W.

                TIMER_CURRENT_COUNTER 

                LAPIC timer current counter register, RO.

                TIMER_DIVIDE_CONFIGURATION 

                LAPIC timer divide configuration register, RW.

                Function Documentation

                Register LAPIC::read ( Index  idx)

                Get value from APIC register.

                Parameters
                idxRegister Offset Index
                Returns
                current value of register
                void LAPIC::write ( Index  idx,
                Register  value 
                )

                Write value to APIC register.

                Parameters
                idxRegister Offset Index
                valuevalue to be written into register
                uint8_t LAPIC::getID ( )

                Get the ID of the current core's LAPIC.

                Returns
                LAPIC ID
                uint8_t LAPIC::getLogicalID ( )

                Get the Logical ID of the current core's LAPIC.

                Returns
                Logical ID
                uint8_t LAPIC::getVersion ( )

                Get version number of local APIC.

                Returns
                version number
                void LAPIC::init ( uint8_t  logical_id)

                Initialized the local APIC of the calling CPU core and sets the logical LAPIC ID in the LDR register.

                Parameters
                logical_idAPIC ID to be set
                void LAPIC::endOfInterrupt ( )

                Signalize EOI (End of interrupt)

                Signalizes the LAPIC that the handling of the current interrupt finished. This function must be called at the end of interrupt handling before ireting.

                void LAPIC::setLogicalID ( uint8_t  id)

                Set the Logical ID of the current core's LAPIC.

                Parameters
                idnew Logical ID
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