Aufgabe 4: Kontextwechsel

Synchronizes the kernel with interrupts using the Prologue/Epilogue Model.

The Guard is used to synchronize between "normal" core activities (currently just the text output, later system calls) and interrupt handling routines. For this purpose, GateQueue provides Guard with a queue for each Core, in which gate objects can be added. This is necessary if the critical section is occupied at the time an interrupt occurs, and the epilogue() method cannot be executed immediately. The queued epilogues are processed when leaving the critical section.

Hints:

• The epilogue queue is a central data structure, whose consistency must be ensured. The implementation provided by the GateQueue may be not interrupt-transparent. In theory, you could fix that by implemening a perfectly interrupt-transparent queue yourself, which is, however, very hard. The simplest solution is to just disable interrupts during operations on the queue (i.e., use hard synchronization).

• In MPStuBS, you need a separate epilogue queue for each core, in which each processor serializes its epilogues. However, epilogues on different cores could then be executed in parallel, since the critical section is managed separately on a per-core base. This must be prevented by using a global Ticketlock to avoid concurrent execution of epilogues – there must never be more than one epilogue active on the whole system at the same time!
  Please note: This giant lock (synchronizing all cores) should not be confused with the (core-specific) flag variable that marks only the entry to the epilogue level on the corresponding core!

• Gate objects must not be enqueued multiple times in the same queue. So if two interrupts of the same type occur so quick (for MPStuBS: on the same core) that the corresponding epilogue has not yet been handled, you must not enqueue the same gate object again. The enqueue methods should prevent this.

• Interrupts should be disabled for as short as possible. Due to this reason, the prologue/epilogue model allows epilogues to be interrupted by prologues. This means that interrupts should be enabled again before the epilogue is executed (this includes notifying the APIC about the End-Of-Interrupt)